The present invention relates to a process for positioning an electrical contact hole between two interconnection lines of an integrated circuit. This positioning process can be more particularly used in methods for the manufacture of MOS integrated circuits (metal - oxide - semiconductor).
The invention more particularly relates to a process making it possible to produce an electrical contact between two interconnection lines of an integrated circuit, formed on two different levels.
The hitherto known positioning processes suffer from a certain number of disadvantages. Due to the alignment imprecisions between the two consecutive masking levels used for obtaining the electrical contact, it is necessary to widen the two interconnection lines at the location of the electrical contact hole.
FIG. 1 is a plan view according to the prior art of the positioning of an electrical contact hole 2 between two interconnection lines, a first line 4 and a second line 6, the first line 4 being positioned below the second line 6. The presence of the widened portions 4a, 6a, respectively of interconnection lines 4, 6, greatly limits the integration density of the integrated circuits.